Cardiovascular diseases are one of the major causes of all human deaths. Irregular heartbeat or arrhythmia is one among many reasons for cardiovascular diseases. Arrhythmia related human cardiac mortality and morbidity can be reduced by implantable devices known as artificial pacemakers that are designed to monitor the cardiac status and to regulate the beating of the heart. A normal heartbeat is created by electrical impulses that are generated within a specialized area of the heart and travel down specific pathways to stimulate the cardiac muscle to contract. If this natural pacemaker or any part of the conduction system is dysfunctional for some reason, the normal heartbeat may become too slow (bradycardia) or fast (tachycardia100bpm). These are abnormal heart rhythms, or arrhythmias. In some cases, physicians will recommend implantation of a pacemaker to correct an arrhythmia. Nearly 200,000 permanent pacemakers are implanted annually in the United States. The battery in a pacemaker can last 7-8 years and is replaced during a minor surgical procedure. The development of the next generation of pacemakers that utilizes ultralow power circuits will extend the battery life further and will reduce the frequencyof the surgical procedure to replace the battery in the pacemaker. Increased battery life of the pacemaker not only will reduce the number of surgical procedures but also will bring down the healthcare cost associated with the surgical procedure. The primary objective of this proposal is to develop low power circuits and systems for ultra-low power cardiac pacemakers which will in turn reduce the frequency of surgical procedures to replace the pacemaker battery. In this research this objective will be achieved first by optimizing the architectures, algorithms and systems of the functional blocks of the cardiac pacemaker. Then we will systematically apply specific dynamic and leakage reductions techniques to the architecturally optimized functional blocks to reduce total energy consumption. In order to verify the soundness of our research strategies, and to validate our power optimized design, the developed ultra low power circuits will be fabricated through MOSIS. The fabricated integrated circuits will be tested for functional correctness and for the desired electrical characteristics.